Syed Farah Naz, Sadat Riyaz and Vijay Kumar Sharma* Pages 1 - 13 ( 13 )
Background: The human ken and understanding about esoteric phenomenon develops the period from space to the sub-atomic level. The passion to further explore the unexplored domains and dimensions boosts the human advancement in a cyclic way. A significant part of such passion follows in the electronics industry. Moore’s law is reaching the practical limitations because of further scaling of metal oxide semiconductor (MOS) devices. The need of a more dexterous and effective technology approach is demanded. Quantum-dot cellular automata (QCA) is an emerging technology which avoids the physical limitations of the MOS device. QCA is a dynamic computational transistor paradigm that addresses device density, power, operating frequency and interconnection problems. It requires an extensive study to know the fundamentals of logic implementation.
Objective: Immense research and experiments due same vigor led to the evolving nanotechnology and a feasible alternative to complementary metal oxide semiconductor (CMOS) technology. A comprehensive study is presented in the paper to enhance the basics of QCA technology and the way of implementation of the logic circuits. Different existing circuits using QCA technology are discussed and compared for different parameters.
Methods: Scaling the devices can reduce the power consumption of the MOS device. Quantum dots are nanostructures made from semi-conductive conventional materials. It is possible to model these constructions as 3-dimensional (3D) quantum energy wells. Logical operations and data movement are performed using Columbic interaction between nearby QCA cells instead of current flow.
Results: The focus of this review paper is to study the trends which have been proposed and compared the designs for various digital circuits. The performance of different circuits such as XOR, adder, reversible gates and flip-flops are provided. Different logic circuits are compared on the parameters such as cell count, area and latency. At least 10 QCA cells are used for the XOR gate with 1 clock latency. Minimum 44 QCA cells are required to make a full adder with 1.25 clock latency.
Conclusion: Designer may choose the best fitted circuit in their logic implementation on the basis of the comparison. The comprehensive study of the QCA technology helps the researchers to learn this field fast and work for the design of less cells count and latency.
QCA, Nanotechnology, Quantum Tunneling, Energy well, Potential barrier, Columbic repulsion
School of Electronics and Communication Engineering, Shri Mata Vaishno Devi University Katra, J&K ‐ 182320, School of Electronics and Communication Engineering, Shri Mata Vaishno Devi University Katra, J&K ‐ 182320, School of Electronics and Communication Engineering, Shri Mata Vaishno Devi University Katra, J&K ‐ 182320